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SN74ABT533APWG4

SN74ABT533APWG4
Mfr. #:
SN74ABT533APWG4
Description:
Latches Octal Transp D-Type
Lifecycle:
New from this manufacturer.
Datasheet:
SN74ABT533APWG4 Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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ECAD Model:
More Information:
SN74ABT533APWG4 more Information SN74ABT533APWG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Latches
RoHS:
Y
Number of Circuits:
8 Circuit
Logic Type:
D-Type Transparent Latch
Logic Family:
ABT
Polarity:
Inverting
Quiescent Current:
30 mA
Number of Output Lines:
8 Line
High Level Output Current:
- 32 mA
Low Level Output Current:
32 mA
Propagation Delay Time:
6.3 ns
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
TSSOP-20
Packaging:
Tube
Function:
Transparent
Height:
1.15 mm
Length:
6.5 mm
Output Type:
3-State
Type:
D-Type
Width:
4.4 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
8 Channel
Number of Input Lines:
8 Line
Supply Current - Max:
24 mA
Operating Supply Voltage:
5 V
Product Type:
Latches
Reset Type:
No Reset
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.002716 oz
Tags
SN74ABT533AP, SN74ABT533A, SN74ABT533, SN74ABT53, SN74ABT5, SN74AB, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Bus Driver, ABT Series, 1-Func, 8-Bit, Inverted Output, BICMOS, PDSO20
***i-Key
IC D-TYPE LATCH SGL 3-ST 20TSSOP
***as Instruments
These octal transparent D-type latches with 3-state outputs are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse of the levels at the D inputs. A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. does not affect the internal operations of the latches. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT533 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT533A is characterized for operation from -40°C to 85°C.
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Availability
Stock:
Available
On Order:
3000
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